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Toshiba Starts Sample Shipment of Industry's First Embedded NAND Flash Memory Modules
--JEDEC UFS Ver.1.1 Standard Compliant Embedded Memories Combine up to 64GB NAND and a Controller in a Single Package--
- February 8, 2013
TOKYO—Toshiba Corporation (TOKYO: 6502) today announced that it has started sample shipments of a 64-gigabyte (GB) embedded NAND flash memory module, the first in the industry equipped with a UFS I/F. The module is fully compliant with the JEDEC UFS Ver.1.1 standard and is designed for application in a wide range of digital consumer products, including smartphones, tablet PCs.
Samples are mainly intended for evaluation of UFS I/F and its protocol in host chipsets and by OS vendors.
Demand continues to grow for large density, high-performance chips that support high resolution video, driven by improved data-processing speeds in host chipsets and wider bandwidths for wireless connectivity.
Toshiba has proved itself an innovator in this key area, and is now reinforcing its leadership by being first in the industry to support samples with a 64GB UFS module.
Toshiba will schedule mass-production and other densities in its line-up according to market demand.
|Part Number||Density||Package||Sample shipment|
|THGLF0G9B8JBAIE||64GB||169Ball 12×16×1.2mm FBGA||January 2013|
- The JEDEC UFS Ver.1.1 compliant interface handles essential functions, including writing block management, error correction and driver software. It simplifies system development, allowing manufacturers to minimize development costs and speed up time to market for new and upgraded products.
- UFS I/F has a serial I/F. It has the scalability in number of lanes and speed.
- The new products are sealed in a small FBGA package, 12x16x1.2mm, and have a signal layout compliant with JEDEC UFS Ver.1.1.
 For embedded NAND flash memory modules. Source: Toshiba, as of February 2013.
 Universal Flash Storage is a product category for a class of embedded memory products built to the JEDEC UFS standard specification.
 JEDEC UFS Ver.1.1 standard has already been published. The Ver.2.0 standard is now under discussion by JEDEC.
 JEDEC UFS Ver.2.0 standard will support multiple-lane and I/F speed.
|Interface||JEDEC UFS Version 1.1 standard|
|Power Supply Voltage||2.7V to 3.6V (Memory core)
1.70V to 1.95V (Controller core)
1.10V to 1.30V (UFS I/F signals)
|Number of lane||Downstream 1lane / Upstream 1lane|
|Temperature range||-25degrees to +85degrees Celsius|
|Package||169Ball 12×16×1.2mm FBGA|
Information in this document, including product prices and specifications, content of services and contact information, is correct on the date of the announcement but is subject to change without prior notice.