Development of BiCS FLASH™

June 03, 2019

Flash memories are used in a wide range of information devices and IT industries to store data, including smartphones, game consoles, car navigation systems, and cloud servers. To meet the demand for ever-smaller, higher-capacity storage devices, it is essential to increase the storage density of flash memories. For two-dimensional (2D) NAND flash memories, we have employed nanofabrication and other technologies to develop a 15-nm memory cell, realizing such flash memories. However, geometry scaling is approaching the physical limit. BiCS FLASH™ overcomes the density limit through multilayer cell array stacking. The latest 96-layer BiCS FLASH™ provides a capacity of 512 gigabits with a chip width of roughly 12 mm, much smaller than a one-cent coin, and an approximately 50% higher bit density than the preceding 64-layer BiCS FLASH™. We are currently committed to the development of technology to further increase the number of stacked layers in order to meet the rapidly growing demand for memory capacity driven by the information explosion.

roadmap of NAND FLASH