Accurate Picture of Cycling Degradation in HfO₂-FeFET Based on Charge Trapping dynamics Revealed by Fast Charge Centroid Analysis

Recently, FeFET (Ferroelectric FET) which is a MIS*¹ FET with ferroelectric gate insulator has attracted much attention as an emerging memory.  FeFET is a non-volatile memory based on V_th modulation due to spontaneous polarization (P_s) reversal in gate insulator. In particular, HfO₂-based FeFET has many advantages such as high speed/low voltage operation as well as CMOS compatibility.
About HfO₂-based FeFET, we previously reported that huge amount of charge trapping/de-trapping cause undesired V_th shifts, resulting in cancellation of almost 90% of P_s effect ^[1,2]. This charge trapping/de-trapping also causes cycling degradation which is a key issue of HfO₂-based FeFET. As shown in Fig.1^[1,2], the ratio of the amount of charge trapping/de-trapping to that of spontaneous polarization reversal increases with cycling resulting in memory window reduction. However, the type of carriers causing higher charge trapping/de-trapping ratio and the degradation mechanism are still unclear.

In this study, based on the method to measure the gate current due to charge trapping/de-trapping and drain current simultaneously, we successfully realized the quantitative extraction of various kinds of charge trapping/de-trapping. As a result, it is demonstrated that a part of electrons at HfO₂/SiO₂ interface, which is caused by program operation, becomes fixed with cycling followed by an additional hole trapping at erase operation. This trapped hole is released at next program operation, resulting in memory window reduction. Based on these findings, we conclude that not only electron trapping but also its stabilization should be suppressed for the improvement of cycling characteristic of HfO₂-based FeFET.